JTAG/urjtag

urjtag + DLC5互換ケーブル †

jtag> detectflash 0xFFC00000
bus_write: address 0xffc00055 data 98
bus_write: address 0xffc00000 data ff
bus_write: address 0xffc000aa data 98
bus_write: address 0xffc00000 data ff
bus_write: address 0xffc00154 data 98
bus_write: address 0xffc00000 data ff
cfi_detect = -4
bus_write: address 0xffc00000 data f0
bus_write: address 0xffc00aaa data aa
bus_write: address 0xffc00555 data 55
bus_write: address 0xffc00aaa data 90
bus_write: address 0xffc00000 data f0
AUTOSELECT_M1:dev ID=00ff   man ID=00ff
bus_write: address 0xffc00000 data f0
bus_write: address 0xffc00555 data aa
bus_write: address 0xffc002aa data 55
bus_write: address 0xffc00555 data 90
bus_write: address 0xffc00000 data f0
AUTOSELECT_M2:dev ID=00ff   man ID=00ff
dev ID=00ff   man ID=00ff
bus_write: address 0xffc00000 data f0
bus_write: address 0xffc00555 data aa
bus_write: address 0xffc002aa data 55
bus_write: address 0xffc00555 data 90
bus_write: address 0xffc00000 data f0
amd_detect: mid ff, did ff
Flash not found!

openwice on Cygwin †

jtag> detectflash 0xFFC00000
bus_write: address 0xffc00055  data 98
CFI QUERRY ID0 = 28
bus_write: address 0xffc00000  data ff
bus_write: address 0xffc000aa  data 98
CFI QUERRY ID0 = 51
CFI QUERRY ID1 = 52
CFI QUERRY ID0 = 59
bus_write: address 0xffc00000  data ff

jtag> cable parallel 0x378 DLC5
Initializing Xilinx DLC5 JTAG Parallel Cable III on parallel port at 0x378
jtag> detect
IR length: 8
Chain length: 1
Device Id: 0
chain.c(110) Part 0 without active instruction
chain.c(133) Part 0 without active instruction
chain.c(110) Part 0 without active instruction
jtag> include motorola/mpc8241/1.2
jtag> endian big
jtag> instruction SAMPLE/PRELOAD
jtag> shift ir
jtag> shift dr
jtag> instruction EXTEST
jtag> shift ir
jtag> initbus mpc824x
jtag> detectflash 0xFFC00000
bus_write: address 0xffc00055  data 98
bus_write: address 0xffc00000  data ff
bus_write: address 0xffc000aa  data 98
bus_write: address 0xffc00000  data ff
Query identification string:
        Primary Algorithm Command Set and Control Interface ID Code: 0x0002 (AMD
/Fujitsu Standard Command Set)
        Alternate Algorithm Command Set and Control Interface ID Code: 0x0000 (n
ull)
Query system interface information:
        Vcc Logic Supply Minimum Write/Erase or Write voltage: 2700 mV
        Vcc Logic Supply Maximum Write/Erase or Write voltage: 3600 mV
        Vpp [Programming] Supply Minimum Write/Erase voltage: 11500 mV
        Vpp [Programming] Supply Maximum Write/Erase voltage: 12500 mV
        Typical timeout per single byte/word program: 16 us
        Typical timeout for maximum-size multi-byte program: 0 us
        Typical timeout per individual block erase: 1024 ms
        Typical timeout for full chip erase: 0 ms
        Maximum timeout for byte/word program: 512 us
        Maximum timeout for multi-byte program: 0 us
        Maximum timeout per individual block erase: 16384 ms
        Maximum timeout for chip erase: 0 ms
Device geometry definition:
        Device Size: 4194304 B (4096 KiB, 4 MiB)
        Flash Device Interface Code description: 0x0002 (x8/x16)
        Maximum number of bytes in multi-byte program: 1
        Number of Erase Block Regions within device: 4
        Erase Block Region Information:
                Region 0:
                        Erase Block Size: 65536 B (64 KiB)
                        Number of Erase Blocks: 63
                Region 1:
                        Erase Block Size: 32768 B (32 KiB)
                        Number of Erase Blocks: 1
                Region 2:
                        Erase Block Size: 8192 B (8 KiB)
                        Number of Erase Blocks: 2
                Region 3:
                        Erase Block Size: 16384 B (16 KiB)
                        Number of Erase Blocks: 1